1. Field of the Invention
The present invention relates to an analog/digital conversion system for converting an analog voltage into digital data.
2. Description of Related Art
FIG. 1 is a block diagram showing a major part of a conventional analog/digital conversion system of sequential comparison type. An analog voltage ANV to be converted into a digital form is applied to one input terminal of a comparator 3 through a switch 2A.sub.1. A reference voltage V.sub.REF produced from a ladder resistor 4 having a tap decoder not shown is applied to the other input terminal of the comparator 3 through a switch 2A.sub.2. The output of the comparator 3 is applied to an analog/digital conversion register (hereinafter referred to as "the A/D conversion register") 7.
The value of the A/D conversion register 7 is supplied to the ladder resister 4, and is also outputted as an 8-bit digital data DD externally. One terminal of tile ladder resistor 4 is connected to a power supply V.sub.R providing a reference power supply, and the other terminal thereof is connected to the ground potential V.sub.S. The comparator 3 and the A/D conversion register 7 are controlled by an analog/digital control circuit (hereinafter referred to as "the A/D control circuit") 9. The switches 2A.sub.1, 2A.sub.2 are adapted to perform the switching operation in complementary fashion under the control of a sample clock #.phi., .phi. sent from the A/D control circuit 9, respectively.
Now, the operation of this analog/digital conversion system will be explained. In the case where an analog voltage is to be converted into 8-bit digital data, first, the A/D control circuit 9 begins the analog/digital conversion operation, clearing all the bits of the A/D conversion register 7 to "0". Then, the most significant bit of the A/D conversion register 7 is set to "1". The switch 2A.sub.1 is turned on by an L-level sample clock #.phi. to apply the analog voltage ANV to the comparator 3. The switch 2A.sub.2 is turned on by an H-level sample clock .phi., so that the reference voltage V.sub.REF is applied from the ladder resistor 4 to the comparator 3. The reference voltage V.sub.REF thus produced is at an output level corresponding to the value of the A/D conversion register 7.
The comparator 3 is compares the magnitude of the analog voltage ANV with that of the reference voltage V.sub.REF, and applies the result of comparison to the A/D conversion register 7. In the case where the analog voltage ANV is relatively large, the most significant bit which has been set to "1" is left intact. When the analog voltage ANV is relatively small, the most significant bit is turned to "0". The second most significant bit of the A/D conversion register 7 is then set to "1" and in a manner similar to the above process, the magnitude is compared between the analog voltage ANV and the reference voltage V.sub.REF by the comparator 3, thereby establishing the second most significant bit to "1" or "0". In this manner, comparing operations are performed eight times for the all bits, whereby the A/D conversion register 7 produces the value DD by converting the analog voltage ANV into 8-bit digital data.
The source potential V.sub.R applied to the ladder resistor 4 and the reference voltage V.sub.REF have the following relationship, in the case where the value n of the A/D conversion register 7 is expressed in decimal notation:
When n=0, EQU V.sub.REF =0 (1) PA1 When n=1 to 255 EQU V.sub.REF =V.sub.R /{256(n-0.5)} (2)
Also, the relationship of the reference voltage V.sub.REF to the value of the A/D conversion register 7 is given in Table 1.
TABLE 1 __________________________________________________________________________ REFERENCE VOLTAGE VALUE OF A/D CONVERSION REGISTER V.sub.REF __________________________________________________________________________ START OF COMPARISON ##STR1## 0 FIRST TIME COMPARISON ##STR2## V.sub.R /2 - V.sub.R /512 SECOND TIME COMPARISON ##STR3## V.sub.R /2 .+-. V.sub.R /4 - V.sub.R /512 THIRD TIME COMPARISON ##STR4## V.sub.R /2 .+-. V.sub.R /4 .+-. V.sub.R /8 - V.sub.R /512 . . SEVENTH TIME COMPARISON ##STR5## END OF EIGHT TIME COMPARISON ##STR6## __________________________________________________________________________
In a conventional analog/digital conversion system, a switch is operated in accordance with a sample clock to apply an analog voltage and a reference voltage alternately to a comparator. As long as the analog voltage is applied to the comparator, a ladder resistor is in the stand by state without outputting, the reference voltage, resulting in a low utilization rate. For this reason, in the case where each of two analog voltages is to be converted into digital data, two sets of ladder resistors are required. This remarkably increases the area in a pattern occupied by the ladder resistors, making it impossible to reduce the size of the analog/digital conversion system.